Speed Control of a DC motor with CPLD

Authors

  • Guillermo Tejada Muñoz Universidad Nacional Mayor de San Marcos, Facultad de Ingeniería Electrónica y Eléctrica. Lima, Perú

Keywords:

QUARTUS, DC motor, UP2 Education Board, L293D

Abstract

This article describes the specific logic circuit that has been inserted into a Complex Programmable Logic Device (CPLD) in order to control, open loop, the speed and direction of rotation (clockwise and counterclockwise) of a DC motor. It was used CPLD EPM7128S and 6 volt DC motor. The signal generated by the logic circuit, inserted into the CPLD is PWM (Pulse Wide Modulation), which has been amplified with the L293D (H bridge) integrated circuit. The Quartus II software has been used to program the CPLD.

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Published

2015-06-15

Issue

Vol. 18 No. 1 (2015)

Section

Original papers

License

Copyright (c) 2015 Guillermo Tejada Muñoz

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.

Creative Commons License
Electrónica - UNMSM by Facultad de Ingeniería Electrónica y Eléctrica de la Universidad Nacional Mayor de San Marcos is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.
Based on a work at http://revistasinvestigacion.unmsm.edu.pe/index.php/electron/index.

How to Cite

Speed Control of a DC motor with CPLD. (2015). Electrónica - UNMSM, 18(1), 11-16. https://revistasinvestigacion.unmsm.edu.pe/index.php/electron/article/view/15276