Computer Program for Combinational Logic Circuits Synthesis

Authors

  • Guillermo Tejada Muñoz Facultad de Ingeniería Electrónica y Eléctrica, Universidad Nacional Mayor de San Marcos.Lima, Perú.

Keywords:

tabular method, numerical method, Quine-McKluskey, computer program, synthesis of logic circuits, minimization of logic circuits

Abstract

This paper presents the results of a program to minimize logic functions of up to six variables based on the algorithm of Quine-McCluskey, the program has been coded in C + +, Show some results, which have been validated by comparison with results obtained with Karnaugh maps.

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Published

2010-12-31

Issue

No. 26 (2010)

Section

Original papers

License

Copyright (c) 2010 Guillermo Tejada Muñoz

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.

Creative Commons License
Electrónica - UNMSM by Facultad de Ingeniería Electrónica y Eléctrica de la Universidad Nacional Mayor de San Marcos is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.
Based on a work at http://revistasinvestigacion.unmsm.edu.pe/index.php/electron/index.

How to Cite

Computer Program for Combinational Logic Circuits Synthesis. (2010). Electrónica - UNMSM, 26, 5-12. https://revistasinvestigacion.unmsm.edu.pe/index.php/electron/article/view/3093